1. Field of the Invention
The present invention relates to an electronic card, and more particularly to a multi-function electronic card.
2. Description of Related Art
In the current computer system structure, there are many electronic cards using one interface to provide two or more than two functions. Taking the PCMCIA/CF interface as an example, such a multi-function card is known as LAN/Modem PC Card, ISDN/Modem PC card, Dual serial port PC card, etc. FIG. 1 shows a PCMCIA/CF card supporting N function devices. By a multi-functional controller 11, the N function devices 12 are connected to a host system. According to the PCMCIA/CF specification, there are N functional configuration registers (FCRs) built in the multi-functional controller 11. Thus, the multi-functional controller 11 includes N configuration state registers (CSR). Each CSR is corresponding to a function device 12 for providing the respective control and state information to the host system. For example, the CSR bit 1 (D1) is defined as an interrupt status bit. That is, when one function device 12 issues an interrupt request (IRQ), the CRS bit 1 is set as 1.
If P function devices in the N function devices issue interrupt requests to the multi-functional controller 11, conventionally, as illustrated in FIG. 2, the function device A will issue a first interrupt request IRQ and thus the CSR D1 of the function device A is set as 1. Meanwhile, other function devices also issue interrupt requests IRQs and the D1s of corresponding CSRs are also set as 1. Therefore, the Host IREQ# pin of the multifunctional controller 11 corresponding to the host bus is pulled low, so as to notify the host that there is an interrupt. Then, the interrupt service routine (ISR) checks the multi-functional controller 11 and realizes that the P D1s in the built-in CSRs is set as 1. Therefore, the ISR records the P sets of IRQ data in an interrupt entry table. Then, all D1s in the CSRs are set as zero. Subsequently, based on the contents of the interrupt entry table, the function device A is processed firstly and D1 of the CSR of the function device A is set as 1. When the process is finished, an end of interrupt (EOI) instruction is issued and D1 of the CRS of the function device A is set as zero. At this moment, all D1s in the P CSRs are also zero. Then, the ISR determines to process the second function device B according to the records in the interrupt entry table and then sets the D1 as 1 in the CSR of the function device B. When the process is finished, an EOI instruction is performed to clear the D1 of the CRS of the function device B. According to the above process, the service routine is performed until the service of the p-th function device is completed. The IRQ timing diagram is illustrated in FIG. 3.
From the above example, it is known that, in the conventional multi-function electronic card, when a lot of IRQs required processes, the host must clear and set the D1s of the CSRs of the multi-functional controller 11 very frequently, which results in a great burden to the host, and thus the host may delay the time to process the function devices and can not effectively manage and support the function devices. Therefore, there is a desire for the above conventional multi-function electronic card to be improved.
Accordingly, the primary objective of the present invention is to provide a multi-function electronic card for eliminating the problems in the conventional skill.
To achieve above mentioned objective, the multi-function electronic card in accordance with the present invention includes: a host interface for connecting to a host; a multi-functional controller; and a plurality of function devices, each function device connecting to the host via the host interface by issuing an interrupt request to the multi-functional controller. The multifunctional controller has an interrupt queue and an interrupt status register, each bit of the interrupt status register corresponding to a function device. When a function device issues an interrupt request, an identification number of the function device is stored into the interrupt queue, and only when all the bits in the interrupt status register are zeros, a corresponding bit in the interrupt status register is set as 1 for issuing an interrupt request to the host. When the host has processed the function device, the interrupt queue is updated and the interrupt status register is cleared.
The various objectives and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawing.